Hi, I'm
Ayoub Ben Chaliah
Senior AI Engineer
AI Engineer building high-performance inference systems and reasoning models. I write CUDA kernels, MLIR/LLVM compiler passes, and build reward models. Creator of AdaLLM and Datarus-R1.
Ask me anything
About Me
I'm an AI Engineer based in Paris with deep expertise across the full stack of modern AI systems. My work spans from writing fused CUDA and Triton kernels that squeeze every FLOP out of GPU hardware, to designing MLIR compiler passes that generate optimized code, to training reasoning models that rival systems with twice the parameters.
I co-created Datarus-R1-14B, a reasoning model that outperforms 32B+ systems on AIME and LiveCodeBench while consuming 18–49% fewer tokens. I also built AdaLLM, an NVFP4-first inference engine that achieves ~240% VRAM reduction on Ada Lovelace GPUs.
I led development of CyberDefenderAI, the pilot AI security solution for EnBW — one of Europe's largest energy companies and a critical infrastructure operator in Germany. The system is deployed at their Cyber Defense Center, autonomously hunting threats through multi-step reasoning and sandboxed tool execution.
Previously, I led compiler engineering at ChainsAtlas, where I extended LLVM backends and built a Turing-complete on-chain virtual machine in Solidity. I hold a Master's in AI from IA School Paris and a Bachelor's in Statistics & Data Science from ENSAI.
Location
Paris, France
Experience
5+ years in AI/ML
Education
Masters in Artificial Intelligence (BAC+5)
Languages
French · English (Fluent)
Experience
Senior AI Engineer
ClaireChains SAS · Paris, France
Led end-to-end design and deployment of AI infrastructure spanning reasoning model research, custom GPU kernel development, distributed training, and high-performance inference optimization.
Reasoning Models & Alignment
- Led development of CyberDefenderAI, the pilot AI security tool for EnBW's Cyber Defense Center — a security-focused reasoning model trained via SFT + GRPO with multi-step tool calls and dense per-action rewards
- Co-created Datarus-R1-14B, trained on 144K trajectory episodes using dual-reward GRPO and Hierarchical Reward Modeling, outperforming 32B+ models on AIME and LiveCodeBench
GPU Kernels & Inference
- Built AdaLLM, an NVFP4-first inference runtime for RTX 4000 series with FP8 KV-cache and custom decode kernels — ~240% VRAM reduction
- Implemented custom CUDA and Triton kernels for Ada/Hopper architectures: FlashAttention variants, fused MoE routing kernels, PTQ/QAT pipelines
- SSD-based KV-cache offloading using NVIDIA GDS with speculative prefetching for long-context generation
Compiler Infrastructure (C++)
- Designed custom MLIR passes and LLVM lowering paths for optimized inference codegen across CUDA and Triton
- Worked across dialects (Linalg, Vector, GPU, SCF, Affine) for tiling, vectorization, and lowering to AVX2/AVX-512
Lead Compiler Engineer
ChainsAtlas
Led all engineering for a cross-chain virtualization platform enabling execution of Web2 code (C, Python, JavaScript) on EVM and non-EVM blockchains.
- Extended LLVM backend with custom passes for instruction selection, register allocation, and code generation targeting a custom on-chain ISA
- Built a Turing-complete 16-bit VM interpreter in Solidity with fetch/decode/execute loop and register file
- Exposed EVM primitives to C via compiler intrinsics that lower directly to native opcodes
- Shipped cross-chain interoperability execution layer across EVM and Solana
Machine Learning Engineer
Idatase GmbH · Berlin, Germany
Developed and deployed time series forecasting models on distributed systems for IoT and energy prediction.
- Deployed LSTM, Temporal Fusion Transformer, and ARIMAX models for energy consumption prediction
- Collaborated with Tilia GmbH on power consumption analytics: DTW, K-means clustering, hierarchical consumer segmentation
- Built anomaly detection pipelines (GMMs, autoencoders) and high-performance graph-based REST APIs for digital twins
Featured Projects
AdaLLM
NVFP4-first inference runtime for Ada Lovelace GPUs (RTX 4090). Custom FP8 KV-cache and decode kernels achieve ~240% VRAM reduction with only 20–25% throughput loss.
Datarus-R1-14B
14B reasoning model built from the ground up on 144K trajectory episodes using dual-reward GRPO, Hierarchical Reward Modeling, and cosine curriculum scheduling. Outperforms QwQ-32B on LiveCodeBench and GPQA Diamond while using 18–49% fewer tokens. Reached #11 on HuggingFace's trending models on release day.
CyberDefenderAI
Pilot AI security tool for EnBW's Cyber Defense Center. Security-focused reasoning model with SFT + GRPO, multi-step tool calls, and dense per-action reward training on simulated attack episodes.
Superposition Transformer
Novel MoE architecture using B-spline blending and autoencoders to merge base and fine-tuned model representations, mitigating catastrophic forgetting with minimal parameter overhead.
Datarus JupyterAgent
Multi-step reasoning pipeline built on Datarus-R1-14B. Autonomous data analysis agent that reasons, writes code, executes, and self-corrects inside Docker-isolated Jupyter notebooks.
TimeSeriesGAN
GANs for time series analysis: synthetic data generation, anomaly detection, and interpolation. Uses Optuna for hyperparameter optimization and MLFlow for experiment tracking.
Publications
Datarus-R1: An Adaptive Multi-Step Reasoning LLM for Automated Data Analysis
A 14B open-weights reasoning model built through multi-stage training for automated data analysis. Learns from complete analytical workflows including reasoning chains, code execution, error handling, and self-corrections. Introduces a dual-reward framework combining tag-based structural signals with a Hierarchical Reward Model.
Superposition in Transformers: A Novel Way of Building Mixture of Experts
Proposes a novel architecture using autoencoders to merge hidden representations of base and fine-tuned models within shared parameters. Uses B-spline-based blending coefficients for smooth interpolation and adaptive autoencoders for dynamic model state switching at inference time.
Technical Skills
GPU & Kernels
Inference & Serving
Compilers
Training & Alignment
Distributed Systems
Frameworks & Hardware
Get In Touch
I'm open to new opportunities where I can push the boundaries of AI systems — whether that's building faster inference engines, training smarter models, or designing compiler infrastructure for the next generation of hardware. Let's talk.